News Room
SystemC Japan 2010 Slated for July 2 in Yokohama
Technical Presentations from Ricoh, Renesas, Primegate, and Sony Highlight Agenda
YOKOHAMA, Japan -- June 23, 2010 -- The Open SystemC Initiative (OSCI), an independent non-profit organization dedicated to supporting and advancing SystemC(tm) as an industry-standard language for electronic system-level (ESL) design, announces the first SystemC Japan will be held Friday, July 2 in Yokohama, Japan. For more information visit http://www.systemcjapan.com/SystemCJapan2010/ (Japanese). ... More »
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Author Roundtable: New TLM Design And Verification Book
Cadence last week announced the publication of a new book entitled TLM-Driven Design and Verification Methodology. Available on-line, the book describes in very practical terms what's needed to implement a transaction-level modeling (TLM) based design and verification flow. In this roundtable interview, four Cadence co-authors - Michael McNamara, Guy Mosenson, Mike Stellfox, and Yosinori Watanabe - join with another co-author, consultant Brian Bailey, to answer questions related to the book and its contents. |
Cadence Industry Insights Blog 26 Jul 2010 |
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What Language Is Best For High Level Synthesis?
I was not expecting the last panel on the last day of the Design Automation Conference to be well attended, but it was - along with animated discussions and a long line of audience members waiting to ask questions. It turns out that a lot of people were interested in the panel's title: "What input language is best for high-level synthesis?" |
Cadence Industry Insights Blog 30 Jun 2010 |
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SystemC Japan 2010 Slated for July 2 in Yokohama
SystemC Japan 2010, Friday, July 2. This one-day industry event will feature technical presentations on the use of SystemC for system-level design from industry experts and suppliers, highlighted by user case studies. The agenda features six technical user presentations by top Japanese electronics companies and four informative presentations from leading suppliers of electronic design automation tools and technologies. |
EDACafe 23 Jun 2010 |
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North American SystemC User's Group Hosts Co-Located Meeting at DAC Sunday, June 13, Anaheim, CA
Technical Presentations: "How to Create Adaptors Between Modeling Abstraction Levels," "Virtual Development Platforms - What and How Much to Model?" "Modeling Communication Systems Using the SystemC AMS Building Block Library," "New Features for Process Control in SystemC," and "Generating Workload Models from TLM-2.0 Based Virtual Platforms for Efficient Architecture Performance Analysis" |
Yahoo! Finance 02 Jun 2010 |
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Transitioning from C/C++ to SystemC in high-level design
It's far easier to do architecture design in SystemC than it is to do it in C and C++. If co-designing hardware and software using high-level design methods, much of your work will be done in an architecture design phase in SystemC. Here's why. |
Embedded.com 01 Jun 2010 |
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SystemC AMS Extensions: Solving the Need for Speed
Similar to Transaction-level Modeling (TLM), the SystemC AMS extensions introduce smart methods to abstract time and uses known techniques to abstract signal properties. However, analog behavior is continuous in time and continuous in value, captured in an equation system and often seen as difficult to abstract... When applying these abstraction methods in a smart manner, a major improvement in simulation speed is obtained, enabling totally new AMS analysis and verification methods through simulation, which have never been exercised before. |
DAC Knowledge Center 13 May 2010 |
