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Accellera Systems Initiative Announces Standard for Tracking Soft Intellectual Property Usage through the Semiconductor Design and Development Process

"I would like to thank the members of the IP Tagging Working Group for their dedicated efforts in achieving this IP standard," said Kathy Werner, Accellera's IP Tagging working group chair. "Soft IP Tagging 1.0 not only provides a mechanism for version control and bug tracking, but can be used to determine the compatibility of an IP block for reuse in a future design. Engineers can now feel confident there is a standard methodology built around IP reuse, tracking, and data control."

Soft IP Tagging 1.0 now available at www.accellera.org

NAPA, Calif., April 16, 2013 - Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards announces completion of its IP Tagging 1.0 standard. The standard provides a mechanism to track critical soft IP data throughout the entire chip design and development process such that it can be readily identified, tagged, and used again for future designs. Find out ... More »

Latest Accellera Systems Initiative Press Releases
Accellera Systems Initiative Announces Standard for Tracking Soft Intellectual Property Usage through the Semiconductor Design and Development Process 16 Apr 2013
Accellera Systems Initiative Launches Working Group to Standardize Interoperability of Multiple Language Verification Environments and Components 03 Apr 2013
Accellera Systems Initiative Completes SystemC AMS 2.0 Standard for Mixed-Signal Design of Electronic Systems 19 Mar 2013
Supporting Quotes: Accellera Systems Initiative Completes SystemC AMS 2.0 Standard for Mixed-Signal Design of Electronic Systems 19 Mar 2013
IEEE Standards Association and Accellera Systems Initiative Team to Deliver Revised SystemVerilog Standard through IEEE Get Program 25 Feb 2013
Janick Bergeron Receives Accellera Systems Initiative Technical Excellence Award 21 Feb 2013
Accellera Systems Initiative Day Kicks off the 2013 Design and Verification Conference, February 25 14 Feb 2013
Nominations for Accellera Systems Initiative's Technical Excellence Award Open through January 18 15 Nov 2012

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Latest Member Press Releases
Virtual Platform - Quick Start Package (VP-QSP) from CircuitSutra 01 May 2013
Mentor Graphics Verification Academy Launches Coverage Cookbook 19 Nov 2012
Synopsys Honors Accellera Systems Initiative with 2012 Tenzing Norgay Interoperability Achievement Award 24 May 2012
Mentor Graphics Drives Broader Adoption of UVM 22 Feb 2012
ASTC joins Accellera Systems Initiative 28 Dec 2011
Forte Unveils Cynthesizer Ultra, Next-Generation High-level Synthesis 19 May 2010
Forte to Provide Continuous Demonstrations of SystemC High-Level Synthesis at SNUG San Jose Designer Community Expo 25 Mar 2010
Fraunhofer publishes first OSCI standards-compliant implementation for the SystemC AMS extensions 09 Mar 2010

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Latest Media Coverage
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Accellera publishes SystemC-AMS 2.0 standard

Accellera Systems Initiative has published the language reference manual for the latest version of its mixed-signal simulation environment based on SystemC. Version 2.0 of SystemC-AMS adds support for more dynamic behaviors in the analog domain.

Tech Design Forum
20 Mar 2013
DVCon 2013: Engineers Question EDA Standards Leaders at Accellera "Town Hall" Meeting

Do design and verification engineers care about EDA standards? If the Accellera Systems Initiative "Town Hall" meeting at DVCon 2013 Feb. 25 is any indication, the answer is an emphatic yes. A packed audience attended a lively, hour-long meeting in which non-stop questions were answered by Accellera and IEEE standards developers.

Cadence Industry Insights Blog
25 Feb 2013
Master & Commander: DVCon's Stan Krolikoski

Now in its 25th year, DVCon is coming up in a couple of weeks in Silicon Valley. In terms of process nodes, 25 years is about twelve generations. In terms of dog years, it's about four generations. In terms of the life of Stan Krolikoski, however, 25 years is only part of one career. It's also the amount of time Stan's been going to DVCon, even though it had a different name when he attended the first such conference back in 1988.

EDACafe
06 Feb 2013
A look back on 2012: Accellera

Editor's note: While other respondents talked about standards, the response I got from Accellera was so complete that I want to publish it in its entirety.

An important principle of Accellera Systems Initiative is to encourage availability and adoption of next-general EDA and IP standards. To that end, Accellera has realized several accomplishments this year in the areas of technical achievements and standards; industry events; educational videos; and awards.

EE Times
13 Dec 2012
Accellera Systems Initiative: team effort & SystemC Library 2.3

"This week, Accellera Systems Initiative is announcing a new version of its SystemC library, Version 2.3 to be exact. There hasn't been a new version since way back in 2005 with Version 2.1 (albeit 2.2, a bug-fix release, was published in 2006), so this is the culmination of a lot of hard work."

EDACafe
18 Jul 2012
Accellera Systems rolls new SystemC Library

"Accellera Systems Initiative has released the version 2.3.0 of its SystemC open source proof-of-concept library. The offering comes free of charge to the global electronic design community, the organization noted.

Compatible with the newly revised IEEE 1666 Standard SystemC Language Reference Manual, announced by the IEEE Standards Association in November last year, version 2.3.0 provides a number features including support for transaction-level modeling (TLM), a critical approach to enable high level and more efficient design of complex ICs and SoCs in a single library, Accellera Systems stated."

EDN Asia
18 Jul 2012

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